Ton,
you do not have to rebuild - the quoted part is automatically imported for vocore.dts caused by row 3 (/include/ "rt5350.dtsi").
The important line out of
https://github.com/openwrt-mirror/openw ... t5350.dtsiis row 190
interrupts = <7>
So the problem is narrowed down for the system tick. I assume the PWM function (which i previously stated is not directly implemented in hardware) is realized with the free running counter - see Chapter 3.6 especially the register offset 0x0h and 0x4h. I think kernel is loading 0x4h with the given value (your time value divided by the system tick time) and after this enabling 0x0h:CNT_EN. After the specific time, the interrupt 7 will be generated.
So far so good.
Let's cut to the error message.
The systemtick is handled by a driver generated through this patch:
https://github.com/openwrt-mirror/openw ... ling.patchThe patch leads to:
https://github.com/torvalds/linux/blob/ ... t-rt3352.cThis file configures systemtick to irq 7 and to external timer interrupt (EXT_STK_EN=1).
I haven't found something exactly sticking to the problem, so i just searched in the kernel sources for the error message prefix "Flags mismatch irq".
I found the file which seems to manage interrupts and generate the messages:
https://github.com/torvalds/linux/blob/ ... q/manage.cThere is more or less just one case which can lead to this message, it begins around row 1050 and i checks for interrupt sharing and level (i think).
I have the feeling that the normal timer interrupt is somehow interfering with that systemtick.
Next step would be register dumping and going through it step by step. i have not vocore to hand though, so i cannot do it - Ton?
What could be needed: All registers from the interrupt controller (0x10000200h base), from the timer (0x10000100h base) and the systemtick (0x10000d00h base). Best time slot to dump is after configuring but not starting the PWM.
So far sorry for not have a solution in hand, but i think this might give new ideas.
Best Regards,
Jonas