CS1 & SPI bus

[obutler]

Hi,

I'm stuck on having the CS1 (SPI bus ) working.
I'm using a recent build of openwrt + vocore plateform.

On linux side, everything seems ok : spidev is here.
On hardware side : I've got datas and clock on the bus while I'm sending data on it.

But CS1 remains always at the high level.

Do I missing something ?

thanks for your help.

Olivier

[Vonger]

There is a system register default make CS1 as GPIO, change this to 2b00

GPIOMODE: GPIO Purpose Select (offset: 0x0060)
Bits 22:21 RW SPI_CS1_MODE default 0x2
2’b00: SPI_CS1
2’b01: Watchdog reset output (active low for 3 system clocks)
2’b10: GPIO mode