VoCore Forum

Hi,

I'm doing a project including a clock i want to link to internet.
I have a CC2500 2.4GHz chip from TI to make a little network between my clocks.

There is some option for the internet gateway, Raspberry PI, BeagleBone Black.
I was interested in VoCore. I got two, one of which has the dock.

I tested the CC2500 on R-Pi and BBB. I managed to send/receive data between the two with a simple setup.
I'm using SPIDEV. The SPIDEV_TEST app works on R-PI and BBB.

Last night, I wanted to test the CC2500 chip with VoCore. First I tried to run the SPIDEV_TEST but I could get it to work.
I have either all ones or all zeros which means i have the MISO correct. Despite connecting the MOSI to the MISO i didn't get back any data i am sending. For some reason the MOSI seems to be low when MISO is sampling.

I connected the CLK and MOSI to a serial port to see if i have anything going on and the serial console showed some stuff. This may not be the best test ever but from this I'm guessing i have the CLK and MOSI identified and correct.

I'm using the default installation that came with the VoCore and i built a ramdisk image from the OpenWRT Source. Same result in both case.
The OpenWRT source has the patches for SPI.

Does anyone has the SPIDEV_TEST working on the release version of the VoCore ?

Regards

Hi,

I managed to see data on the MOSI line using SPIDEV and read data on MISO.

I was testing the SPI by creating a loopback between MOSI and MISO and this is perhaps not such a good idea since the flash is on the same bus !!! And then i wonder why when I leave the loopback in place the board doesn't boot anymore. Shame on me.

From my test on the R-PI and BBB, I'm able to do FULL DUPLEX SPI communication with SPIDEV.
I noticed that the same code on the VoCore doesn't give FULL DUPLEX but only half duplex ( a block of data written and then a block of data read ). A look at the driver confirms that spi-RT2880.c handles the TX buffer and then the RX buffer.

Could anyone tell me if it is possible to do FULL DUPLEX SPI communication on the RT5350 ?

From the datasheet i found online, you can write data to the SPIDATA register prior to starting a read operation .

It is possible but the driver still have some problem.

I modified the SPI driver to test full duplex communication.
I tested, writing a byte to SPIDATA before activating STARTRD then reading SPIDATA after the transfer.
I tested, writing a byte to SPIDATA before activating STARTRD and STARTWR then reading SPIDATA after the transfer.
I tested, writing a byte to SPIDATA before activating STARTWR then reading SPIDATA after the transfer. The data read was the data being sent.

No luck getting close to full duplex.

In the datasheet of the RT5350 i found, there is :

HIZSDO
Tri-state Data Out
0: The SPIDO pin remains driven after the cycle is
complete.
1: The SPIDO pin is tri-stated after the cycle is complete.
NOTE: This bit applies to write transfers only; for read
transfers the SPIDO pin is tri-stated during the transfer.

Which would suggest that full duplex spi is not possible. The datasheet i have may not be the correct one.
I tried testing the MOSI line to check for the tri-state during read transfer but the line remained low which would suggest it is being driver.

More detailed information would be require to better understand how the SPI controller is behaving.

Regards,

If that is RT5350 datasheet, I think we are read the same one
That is all the information we have, a little hard...have to guess and test.
I export the memory register to user space and test it, that is easier for heavy debug, here is my ugly source code and my process, might help http://vonger.cn/?s=SPI