Source to U-boot

rayk
 
Posts: 3
Joined: Sat Nov 22, 2014 6:24 am

Source to U-boot

Sat Nov 22, 2014 6:29 am

Where can I find the source to u-boot used in the VoCore?

Vonger
 
Posts: 768
Joined: Sun Oct 19, 2014 6:00 am

Re: Source to U-boot

Sat Nov 22, 2014 1:59 pm

There is no real uboot source for VoCore now...
It was in my Liunx VM, but I just format my disk and forget to get it out...Just left the uboot.img in my server.
I highly recommend to use the official uboot. Or if you have ability, just make uboot support VoCore officially.
Also upload an old version of uboot from MTK. http://vonger.cn/upload/uboot.source.zip, the source quality is not very high, many bugs.

rayk
 
Posts: 3
Joined: Sat Nov 22, 2014 6:24 am

Re: Source to U-boot

Sun Nov 23, 2014 4:42 am

What I was really trying to get is the configuration of uboot used by VoCore. I know where to find the actual uboot source, but the configuration currently used by VoCore would be helpful.

Vonger
 
Posts: 768
Joined: Sun Oct 19, 2014 6:00 am

Re: Source to U-boot

Sun Nov 23, 2014 3:05 pm

The source code can not recover.
What I do to the source:
1. https://forum.openwrt.org/viewtopic.php?id=44472
2. replace and remove some printf in the offical source code.

micke.prag
 
Posts: 2
Joined: Sun Dec 21, 2014 4:11 pm

Re: Source to U-boot

Sun Dec 21, 2014 4:14 pm

Which toolchain are you using to build U-boot?

Vonger
 
Posts: 768
Joined: Sun Oct 19, 2014 6:00 am

Re: Source to U-boot

Mon Dec 22, 2014 7:19 am

openwrt mips gcc toolchain.
You can get that by compile openwrt.

micke.prag
 
Posts: 2
Joined: Sun Dec 21, 2014 4:11 pm

Re: Source to U-boot

Tue Dec 23, 2014 3:06 pm

I tried the one from OpenWRT but got compilation error. I will post my error here when I am back from holiday.

noblepepper
 
Posts: 240
Joined: Sat Nov 29, 2014 3:22 pm

Re: Source to U-boot

Sat Feb 28, 2015 12:35 pm

Note: DO NOT DO THIS!!! You can easily turn your VoCore into a paper weight!!! I messed up Uboot on my first try and had to rewrite the flash chip from a back up I made.

I used the toolchain in the Uboot directory from Wive firmware then ran make menuconfig in Vonger's Uboot sources and set the location of the toolchain, Chip Type to ASIC, Chip ID to RT5350 and DRAM Component to 256Mb (32MB x 8 bit bytes) then made the change Vonger mentioned and it compiles for me. I wrote it to the VoCore by making an image with mtd0 r/w and writing it from Openwrt.

I did upload an openwrt image through serial with kermit without problems but haven't done any other testing.

Now my VoCore is very chatty, it boots up with this:

Code: Select all
U-Boot 1.1.3 (Feb 27 2015 - 09:36:47)

Board: Ralink APSoC DRAM:  32 MB
relocate_code Pointer at: 81fb4000
spi_wait_nsec: 42
spi device id: ef 40 18 0 0 (40180000)
Warning: un-recognized chip ID, please update bootloader!
raspi_read: from:30000 len:1000
.raspi_read: from:30000 len:1000
.============================================
Ralink UBoot Version: 4.0.0.0
--------------------------------------------
ASIC 5350_MP (Port5<->None)
DRAM_CONF_FROM: Boot-Strapping
DRAM_TYPE: SDRAM
DRAM_SIZE: 256 Mbits
DRAM_WIDTH: 16 bits
DRAM_TOTAL_WIDTH: 16 bits
TOTAL_MEMORY_SIZE: 32 MBytes
Flash component: SPI Flash
Date:Feb 27 2015  Time:09:36:47
============================================
icache: sets:256, ways:4, linesz:32 ,total:32768
dcache: sets:128, ways:4, linesz:32 ,total:16384

 ##### The CPU freq = 360 MHZ ####
 estimate memory size =32 Mbytes

Please choose the operation:
   1: Load system code to SDRAM via TFTP.
   2: Load system code then write to Flash via TFTP.
   3: Boot system code via Flash (default).
   4: Entr boot command line interface.
   7: Load Boot Loader code then write to Flash via Serial.
   9: Load Boot Loader code then write to Flash via TFTP.
 0
   
3: System Boot system code via Flash.
## Booting image at bc050000 ...
raspi_read: from:50000 len:40
.   Image Name:   MIPS OpenWrt Linux-3.10.49
   Created:      2015-01-22  15:30:19 UTC
   Image Type:   MIPS Linux Kernel Image (lzma compressed)
   Data Size:    1003882 Bytes = 980.4 kB
   Load Address: 80000000
   Entry Point:  80000000
raspi_read: from:50040 len:f516a
................   Verifying Checksum ... OK
   Uncompressing Kernel Image ... OK
No initrd
## Transferring control to Linux (at address 80000000) ...
## Giving linux memsize in MB, 32

Starting kernel ...

[    0.000000] Linux version 3.10.49

noblepepper
 
Posts: 240
Joined: Sat Nov 29, 2014 3:22 pm

Re: Source to U-boot

Tue Mar 17, 2015 3:15 pm

I have ported much of pepe2k's work for Atheros systems to the VoCore/Ralink u-boot. At this point it is controlled from the UART/TTL port even though it transfers the image over a web page. Obviously this is not the end product since if you have the UART connection you can use it to upload the image.

I want to trigger the web page with a signal on one of the gpio pins, it needs to not be one of the ones the RT5350 uses for boot control which from the VoCore schematic appear to be: LED4, LED3, LED2, LED1, LED0, WLAN LED, JTAG_TDI, JTAG_TMS, JTAG_CLK, JTAG_RST, JTAG_TDO, I2C_CLK, I2C_SD, GPIO0.

Does anyone have suggestions for what gpio to trigger the web failsafe mode with?

For the curious, here is what a web upload looks like at this point:

Code: Select all
U-Boot 1.1.3 (Mar 17 2015 - 09:18:59)

Board: Ralink APSoC DRAM:  32 MB
relocate_code Pointer at: 81fac000
******************************
Software System Reset Occurred
******************************
spi_wait_nsec: 42
spi device id: ef 40 18 0 0 (40180000)
Warning: un-recognized chip ID, please update bootloader!
raspi_read: from:30000 len:1000
.raspi_read: from:30000 len:1000
.============================================
Ralink UBoot Version: 4.0.0.0
--------------------------------------------
ASIC 5350_MP (Port5<->None)
DRAM_CONF_FROM: Boot-Strapping
DRAM_TYPE: SDRAM
DRAM_SIZE: 256 Mbits
DRAM_WIDTH: 16 bits
DRAM_TOTAL_WIDTH: 16 bits
TOTAL_MEMORY_SIZE: 32 MBytes
Flash component: SPI Flash
Date:Mar 17 2015  Time:09:18:59
============================================
icache: sets:256, ways:4, linesz:32 ,total:32768
dcache: sets:128, ways:4, linesz:32 ,total:16384

 ##### The CPU freq = 360 MHZ ####
 estimate memory size =32 Mbytes

Please choose the operation:
   1: Load system code to SDRAM via TFTP.
   2: Load system code then write to Flash via TFTP.
   3: Boot system code via Flash (default).
   4: Entr boot command line interface.
   8: Start Web Server to load system code.
   9: Load Boot Loader code then write to Flash via TFTP.

You chose 8

 raspi_read: from:40028 len:6
 NetTxPacket = 0x81FE64C0
 KSEG1ADDR(NetTxPacket) = 0xA1FE64C0
 NetLoop,call eth_halt !
 NetLoop,call eth_init !
Trying Eth0 (10/100-M)
 Waitting for RX_DMA_BUSY status Start... done
 Header Payload scatter function is Disable !!

 ETH_STATE_ACTIVE!!
Trying Eth0 (10/100-M)

 ETH_STATE_ACTIVE!!
HTTP server is starting at IP : 192.168.1.1
HTTP server is ready!

Web Data will be downloaded at 0x80300000 in RAM
Upgrade type: firmware
Upload file size: 3670020 bytes
Loading: #######################################
         #######################################
         #######################################
       <snip>
         #######################################
         ######

upload size: 0x  380032, expected size: 0x  380004
upload good
HTTP upload is done! Upgrading...


****************************
*    FIRMWARE UPGRADING    *
* DO NOT POWER OFF DEVICE! *
****************************

Executing: erase linux; cp.weblinux


 Erase linux kernel block !!
From 0x50000 length 0x3B0000
raspi_erase: offs:50000 len:3b0000
...........................................................

 Copy linux image from web[3670020 byte] to SPI Flash[0x00050000]....
raspi_write: to:50000 len:380004
.........................................................
HTTP ugrade is done! Rebooting...



U-Boot 1.1.3 (Mar 17 2015 - 09:18:59)

Board: Ralink APSoC DRAM:  32 MB
relocate_code Pointer at: 81fac000
******************************
Software System Reset Occurred
******************************

noblepepper
 
Posts: 240
Joined: Sat Nov 29, 2014 3:22 pm

Re: Source to U-boot

Sat Apr 04, 2015 8:53 pm

I have a functioning uboot that can upload images over http in addition to the stock serial and tftp methods (flagrant plagerization of pepe2k's work for atheros soc's) is anyone interested in trying/testing this?

Some features:

Webpage available on Ethernet port for image upload, triggered by gpio or selection on serial connection.

Uboot console still available as in stock VoCore uboot, activated by 4 from boot menu instead of x.

Standard ralink sdk uboot options also available from boot menu such as loading and running an image without changing flash.

The rough edges:

Copius noise on the serial connection during boot up, useful for debugging but otherwise undesirable.

Only gpios that can trigger webpage are 0 & 27

Webpage presents options that aren't available, results in 404 page.

Before you even think about trying this you need to consider that it is inherently dangerous, you can brick the VoCore. On the upside I have found you can reload the flash chip without unsoldering it if you make proper backups, the only hardware I needed was a Arduino Uno and a level translator dip on a breadboard.

If there is interest, the rough edges are not hard to eliminate for a final version.

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